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TERAFAB Explained: Elon's 119 BILLION Dollar Plan to Crush TSMC - YouTube
BitBiasedAI
Published
May 16, 2026
Added
1w ago
Open on YouTube ↗
Chapters
Topic clips curated from this video. Click to jump in.
1:19
Supply-Chain Bottleneck Justification
Capacity ceiling argument
"Even best-case supplier output is insufficient"
1:19
Supply-Chain & Geopolitical Risks
2 % global shortfall
"All chip factories on Earth combined can only meet about 2 % of our needs."
1:38
Comparison to TSMC & Samsung
2 % supply shortfall
"All chip factories on Earth combined can only meet about 2 % of our needs."
2:28
Vertical Integration & Recursive Loop
9-month recursive loop
"Design a chip, update the mask, run it, test it... faster than the industry"
2:57
Iteration Speed & Recursive Loop
Recursive loop collapses months into days
"Design... bake... test... fix... same building"
2:57
Vertical Integration Under One Roof
10x faster than industry standard
"Design, bake, test, revise same day"
3:17
Vertical Integration & Recursive Loop
End-to-end integration advantage
"Design, bake, test all in one building... 9-month product cycle"
4:36
AI5, AI6, D3 Chip Generations
Designed for vacuum extremes
"D3 space-grade radiation hardened"
4:56
Comparison to Existing Fabs
Intel partnership technology
"Intel 18A process... 15-20% better performance"
5:45
Comparison to TSMC & Samsung
Tesla attempts 30-year achievement in 3 years
"TSMC spent $165 billion... 30 years"
5:45
Comparison to TSMC & Samsung Fabs
TSMC Arizona benchmark
"TSMC spent 165 billion... Arizona... 2 nm until 2029"
6:35
Chip Families: AI5/AI6 & D3 Space Chips
Chip specialization by environment
"AI5 for FSD and Optimus... D3 for orbital environment"
9:03
Intel 14A Technology Risk
14A ramp risk
"Intel 14A... not yet on the market... double risk stack"
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